The name is the button.

An agent writes the code now, and a human thumb hovers over Accept all a hundred times a day. The honest question of this decade is what, exactly, you just accepted. So I read the diff.

Eight years as a backend engineer in Stockholm, back in Tokyo since 2023, and I still ship something small most nights, usually badly. My one rule: the only real review of a model is the thing you built with it. That is why there is no leaderboard on this site.

Around a hundred and forty sources come through — the labs' own posts, the papers, the tools, the runtimes and languages nobody is watching yet, the chip under the demo, and the newsletters people actually forward. What is moving gets counted so the week reads at a glance, and every few days I explain one mechanism in plain words.

A story here is a headline, a short excerpt, one image and the link to whoever wrote it. We never reproduce the post; the images belong to their authors. A post written in Japanese appears in Japanese, exactly as it was published, and the link goes to the original.

— Yuki Halvorsen, Tokyo

← Accept All Archive

SemiEngineeringSilicon

Foundations of Power Management in the Age of AI

10.28

In an AI datacenter, 50 mV of voltage margin can be worth about 270 racks of compute per gigawatt of input electricity.

Chips & compute

Read at SemiEngineering ↗

One letter a week, starting soon.

Latest

Foundations of Power Management in the Age of AI

Related

SiliconHow Much Can Semiconductor Models Hide? SemiEngineering

SiliconChip Industry Technical Paper Roundup: Oct. 27 SemiEngineering

AsiaNvidia-backed Zankore seeks $3.1b loan for Indonesia AI factory Tech in Asia

AsiaBrain-computer interface startup NeuroXess raises RMB 700 million in Series B funding TechNode

AsiaOpenAI plans to buy rival Google’s AI chips: report Tech in Asia

AsiaSouthchip's SC3606 Driver Chip Targets Sub-1mm Piezoelectric Fans for Phones Pandaily