The name is the button.

An agent writes the code now, and a human thumb hovers over Accept all a hundred times a day. The honest question of this decade is what, exactly, you just accepted. So I read the diff.

Eight years as a backend engineer in Stockholm, back in Tokyo since 2023, and I still ship something small most nights, usually badly. My one rule: the only real review of a model is the thing you built with it. That is why there is no leaderboard on this site.

Around a hundred and forty sources come through — the labs' own posts, the papers, the tools, the runtimes and languages nobody is watching yet, the chip under the demo, and the newsletters people actually forward. What is moving gets counted so the week reads at a glance, and every few days I explain one mechanism in plain words.

A story here is a headline, a short excerpt, one image and the link to whoever wrote it. We never reproduce the post; the images belong to their authors. A post written in Japanese appears in Japanese, exactly as it was published, and the link goes to the original.

— Yuki Halvorsen, Tokyo

← Accept All Archive

TechPowerUpSilicon

(PR) ASUS Unveils XA P2N-E2 Powered by NVIDIA Vera CPU at OCP 2026

October 12

ASUS is expanding its AI infrastructure portfolio with the launch of the XA P2N-E2, a 2U NVIDIA MGX architecture-based server powered by NVIDIA Vera CPUs and designed for agentic AI and reinforcement…

Chips & compute Research

Read at TechPowerUp ↗

One letter a week, starting soon.

Latest

(PR) ASUS Unveils XA P2N-E2 Powered by NVIDIA Vera CPU at OCP 2026

Related

Silicon(PR) Astera Labs Unveils Orion: A Compute-Agnostic Rack-Scale Architecture TechPowerUp

ValleyNvidia tackles AI factory scaling bottlenecks with open rack designs and networking advances SiliconANGLE

SiliconOCP Global Summit: Amid Ecosystem Adoption, NVIDIA Opens Vera Rubin Architecture to Help Scale AI Factories Worldwide NVIDIA Blog

SiliconScaling Decision Optimization to 100 Million Variables and Beyond with mPDLP in NVIDIA cuOpt NVIDIA Technical Blog

ToolsOptimizing Jagged Flash Attention with TLX: The Road Toward SOTA FA4 on Blackwell PyTorch Blog

SiliconQualcomm’s System Level Architecture in the Snapdragon X2 Elite Chips and Cheese